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| MC74VHC50 Hex Buffer The MC74VHC50 is an advanced high speed CMOS buffer fabricated with silicon gate CMOS technology. The internal circuit is composed of three stages, including a buffered output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems to 3 V systems. http://onsemi.com * * * * * * * * High Speed: tPD = 3.8 ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 2 mA (Max) at TA = 25C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2 V to 5.5 V Operating Range Low Noise: VOLP = 0.8 V (Max) These devices are available in Pb-free package(s). Specifications herein apply to both standard and Pb-free devices. Please see our website at www.onsemi.com for specific Pb-free orderable part numbers, or contact your local ON Semiconductor sales office or representative. 14-LEAD SOIC D SUFFIX CASE 751A 14-LEAD TSSOP DT SUFFIX CASE 948G 14-LEAD SOIC EIAJ M SUFFIX CASE 965 PIN CONNECTION AND MARKING DIAGRAM (Top View) VCC 14 A6 13 Y6 12 A5 11 Y5 10 A4 9 Y4 8 1 A1 1 2 Y1 A1 2 Y1 3 A2 4 Y2 5 A3 6 Y3 7 GND A2 3 4 Y2 A1 Y3 Y=A A2 A3 A4 Y5 A5 1 1 1 1 1 1 Y1 Y2 Y3 Y4 Y5 Y6 For detailed package marking information, see the Marking Diagram section on page 4 of this data sheet. A3 5 6 FUNCTION TABLE A Input L H Y Output L H A4 9 8 Y4 A5 11 10 ORDERING INFORMATION Device MC74VHC50D Package SOIC SOIC EIAJ Shipping 55 Units/Rail 50 Units/Rail A6 13 12 Y6 A6 Figure 1. Logic Diagram Figure 2. Logic Symbol MC74VHC50M (c) Semiconductor Components Industries, LLC, 2006 March, 2006 - Rev. 4 - 1 Publication Order Number: MC74VHC50/D MC74VHC50 MAXIMUM RATINGS Symbol VCC VIN VOUT IIK IOK IOUT ICC TSTG TL TJ JA DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink Current DC Supply Current per Supply Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature under Bias Thermal Resistance (Note 1) SOIC TSSOP Oxygen Index: 30 to 35 Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 85C (Note 5) VI < GND VO < GND Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC +0.5 -20 20 25 50 -65 to +150 260 +150 125 170 Level 1 UL 94 V--0 @ 0.125 in > 2000 > 200 2000 300 V Unit V V V mA mA mA mA C C C C/W MSL FR VESD Moisture Sensitivity Flammability Rating ESD Withstand Voltage ILatch--Up Latch--Up Performance mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm--by--1 inch, 2--ounce copper trace with no air flow. 2. Tested to EIA/JESD22--A114--A. 3. Tested to EIA/JESD22--A115--A. 4. Tested to JESD22--C101--A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO TA t/V Supply Voltage Input Voltage Output Voltage Operating Free--Air Temperature Input Transition Rise or Fall Rate VCC = 3.0 V 0.3 V VCC = 5.0 V 0.5 V (Note 6) (HIGH or LOW State) Parameter Min 2.0 0 0 -55 0 0 Max 5.5 5.5 VCC +125 100 20 Unit V V V C ns/V 6. Unused inputs may not be left open. All inputs must be tied to a high-- or low--logic input voltage level. NOTE: The JA of the package is equal to 1/Derating. Higher junction temperatures may affect the expected lifetime of the device per the table and figure below. http://onsemi.com 2 MC74VHC50 DC ELECTRICAL CHARACTERISTICS VCC Symbol VIH Parameter Minimum High--Level Input Voltage Test Conditions (V) 2.0 3.0 4.5 5.5 2.0 3.0 4.5 5.5 VIN = VIH or VIL IOH = --50 mA VIN = VIH or VIL IOH = --4 mA IOH = --8 mA VOL Maximum Low--Level Output Voltage VIN = VIH or VIL VIN = VIH or VIL IOL = 50 mA VIN = VIH or VIL IOL = 4 mA IOL = 8 mA IIN ICC Maximum Input Leakage Current Maximum Quiescent Supply Current VIN = 5.5 V or GND VIN = VCC or GND 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 0 to 5.5 5.5 1.9 2.9 4.4 2.58 3.94 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 0.1 2.0 2.0 3.0 4.5 Min 1.5 2.0 3.15 3.85 0.5 0.9 1.35 1.65 1.9 2.9 4.4 2.48 3.80 0.1 0.1 0.1 0.44 0.44 1.0 20 TA = 25C Typ Max TA 85C Min 1.5 2.0 3.15 3.85 0.5 0.9 1.35 1.65 1.9 2.9 4.4 2.34 3.66 0.1 0.1 0.1 0.52 0.52 1.0 40 Max TA 125C Min 1.5 2.0 3.15 3.85 0.5 0.9 1.35 1.65 Max Unit V VIL Maximum Low--Level Input Voltage V VOH Minimum High--Level Output Voltage VIN = VIH or VIL V V V V mA mA AC ELECTRICAL CHARACTERISTICS (Cload = 50 pF, Input tr = tf = 3.0 ns) TA = 25C Symbol tPLH, tPHL Parameter Maximum Propogation Delay, Input A to Y Test Conditions VCC = 3.0 0.3 V VCC = 5.0 0.5 V CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF Min Typ 5.0 7.5 3.8 5.3 4 Max 7.1 10.6 5.5 7.5 10 TA 85C Min Max 8.5 12.0 6.5 8.5 10 TA 125C Min Max 10.0 14.5 8.0 10.0 10 pF Unit ns CIN Maximum Input Capacitance Typical @ 25C, VCC = 5.0 V 18 CPD Power Dissipation Capacitance (Note 7) pF 7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no--load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V) TA = 25C Symbol VOLP VOLV VIHD VILD Characteristic Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage Typ 0.8 --0.8 Max 1.0 --1.0 3.5 1.5 Unit V V V V http://onsemi.com 3 MC74VHC50 TEST POINT VCC A 50% tPLH 50% VCC *Includes all probe and jig capacitance tPHL GND DEVICE UNDER TEST OUTPUT CL* Y Figure 3. Switching Waveforms Figure 4. Test Circuit INPUT Figure 5. Input Equivalent Circuit MARKING DIAGRAMS (Top View) 14 13 12 11 10 9 8 14 13 12 11 10 9 8 VHC50 AWLYWW* 1 2 3 4 5 6 7 1 2 3 VHC 50 ALYW* 4 5 6 7 14-LEAD SOIC D SUFFIX CASE 751A 14 13 12 11 10 9 8 14-LEAD TSSOP DT SUFFIX CASE 948G VHC50 ALYW* 1 2 3 4 5 6 7 14-LEAD SOIC EIAJ M SUFFIX CASE 965 *See Applications Note #AND8004/D for date code and traceability information. http://onsemi.com 4 MC74VHC50 PACKAGE DIMENSIONS SOIC-14 D SUFFIX CASE 751A--03 ISSUE F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. --A14 8 --B1 7 P 7 PL 0.25 (0.010) M B M G C R X 45 _ F --TSEATING PLANE D 14 PL 0.25 (0.010) M K TB S M A S J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 http://onsemi.com 5 MC74VHC50 PACKAGE DIMENSIONS TSSOP DT SUFFIX CASE 948G--01 ISSUE O 14X K REF 0.10 (0.004) 0.15 (0.006) T U S M TU S V S N 2X L/2 14 8 0.25 (0.010) M L PIN 1 IDENT. 1 7 B --U- N F DETAIL E K K1 J J1 SECTION N-N --W- 0.15 (0.006) T U S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE --W--. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 -----1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 -----0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ A --V- C 0.10 (0.004) - - SEATING -TPLANE D G H DETAIL E http://onsemi.com 6 MC74VHC50 PACKAGE DIMENSIONS SO-14 M SUFFIX CASE 965--01 ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE 0.50 LE M Q1 Z MILLIMETERS MIN MAX -----2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 -----1.42 INCHES MIN MAX -----0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 -----0.056 14 8 LE Q1 E HE M_ L DETAIL P 1 7 Z D e A VIEW P c b 0.13 (0.005) M A1 0.10 (0.004) ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800--282--9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082--1312 USA Phone: 480--829--7710 or 800--344--3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2--9--1 Kamimeguro, Meguro--ku, Tokyo, Japan 153--0051 Fax: 480--829--7709 or 800--344--3867 Toll Free USA/Canada Phone: 81--3--5773--3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 7 MC74VHC50/D |
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